DocumentCode
1960476
Title
Shake And Bake: a method of mapping code to irregular DSPs
Author
Grewal, Gary W. ; Wilson, Thomas C.
Author_Institution
Dept. of Comput. & Inf. Sci., Guelph Univ., Ont., Canada
fYear
1997
fDate
4-7 Jan 1997
Firstpage
506
Lastpage
508
Abstract
Generating high quality code for embedded processors is made difficult by irregular architectures and highly encoded parallel instructions. Rather than deal with the target machine at every stage of compilation, a promising new methodology employs generic algorithms to optimize code for an idealized abstraction of the true target machine. This code is then mapped to the real instruction set by enhanced genetic algorithms. One perturbs the original schedule to find a number of alternative (parallel) instruction sequences, and the other evolves feasible register assignments, if possible, for each sequence. This paper outlines the strategy for mapping idealized code into actual code. The COGEN(T) system employs this methodology to produce good code for different commercial DSPs
Keywords
circuit optimisation; digital signal processing chips; genetic algorithms; instruction sets; logic CAD; parallel architectures; real-time systems; COGEN(T) system; Shake And Bake modules; code mapping; code optimization; embedded processors; enhanced genetic algorithms; generic algorithms; high quality code generation; highly encoded parallel instructions; instruction set; irregular DSPs; irregular architectures; parallel instruction sequences; register assignments; target machine idealized abstraction; Computer aided instruction; Computer architecture; Concurrent computing; Digital signal processing; Embedded computing; Genetic algorithms; Information science; Instruction sets; Optimization methods; Registers;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Design, 1997. Proceedings., Tenth International Conference on
Conference_Location
Hyderabad
ISSN
1063-9667
Print_ISBN
0-8186-7755-4
Type
conf
DOI
10.1109/ICVD.1997.568186
Filename
568186
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