• DocumentCode
    1960655
  • Title

    Iterative simulation-based optimization for parallel batch scheduling problems

  • Author

    Doleschal, Dirk ; Klemmt, Andreas ; Weigert, Gerald

  • Author_Institution
    Dept. of Electr. Eng. & Inf. Technol., Tech. Univ. Dresden, Saxony, Germany
  • fYear
    2011
  • fDate
    11-15 May 2011
  • Firstpage
    374
  • Lastpage
    379
  • Abstract
    The optimization of manufacturing flows in electronics and semiconductor industry becomes more and more important. This results from the high complexity of the underlying production processes. In this research a selected part of the process with high practical impact is investigated. It is a scheduling problem arising in the semiconductor frontend oxidation and diffusion area. The optimization objective is the total weighted tardiness (TWT), but also the changes in cycle time are observed. Because of comparably long processing times and parallel batch processing a high optimization potential exists at the investigated machine groups. The methods dispatching, simulation-based optimization, mixed integer programming (MIP) and variable neighbourhood search (VNS) are compared. In contrast to the traditional simulation-based optimization, where a control variable is selected before a simulation run starts and is kept during the simulation, the new iterative simulation-based optimization approach is capable to generate and optimize small local sub-problems. Afterwards the results are used in a global model. The performance of the new method is comparable to MIP and VNS approaches and is much better than dispatching.
  • Keywords
    electronics industry; integer programming; scheduling; search problems; diffusion area; electronics industry; iterative simulation-based optimization; manufacturing flows; mixed integer programming; optimization objective; parallel batch scheduling problems; production process; semiconductor frontend oxidation; semiconductor industry; total weighted tardiness; variable neighbourhood search; Benchmark testing; Computational modeling; Dispatching; Iterative methods; Job shop scheduling; Optimization; Schedules;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronics Technology (ISSE), 2011 34th International Spring Seminar on
  • Conference_Location
    Tratanska Lomnica
  • ISSN
    2161-2528
  • Print_ISBN
    978-1-4577-2111-3
  • Type

    conf

  • DOI
    10.1109/ISSE.2011.6053891
  • Filename
    6053891