Title :
Switching hysteresis for fast MOS logic
Author :
Zurada, Jacek M. ; Mokashi, Pushkar U.
Author_Institution :
Dept. of Electr. Eng., Louisville Univ., KY, USA
Abstract :
The approximations of hysteresis switching loops describing the dynamic performance of basic MOS gates are presented and discussed for different input signals. Empirical formulas to calculate the width of switching hystereses are outlined. The results may be useful for development of the CMOS/NMOS logic simulation software eliminating the time-consuming transient analysis
Keywords :
MOS integrated circuits; integrated logic circuits; logic CAD; logic gates; CMOS/NMOS logic simulation software; MOS gates; dynamic performance; fast MOS logic; hysteresis switching loops; input signals; switching hystereses; Analytical models; Capacitance; Circuit simulation; Hysteresis; Inverters; Logic; MOS devices; Switching circuits; Transient analysis; Voltage;
Conference_Titel :
Circuits and Systems, 1989., Proceedings of the 32nd Midwest Symposium on
Conference_Location :
Champaign, IL
DOI :
10.1109/MWSCAS.1989.101827
