A low power, low datarate integrated 433 MHz wireless transceiver in CMOS

Author

Christensen, Craig L.

Author_Institution

AMI Semicond., Pocatello, ID, USA

fYear

2003

fDate

30 June-2 July 2003

Firstpage

70

Lastpage

73

Abstract

This paper describes the design of a low power all CMOS Wireless transceiver integrated circuit for use at 433 MHz. This device includes a number of unique features that provide additional flexibility, reduce power consumption, reduce system cost and improve system performance. The design was accomplished in AMI Semiconductors´ standard 0.35 micrometer CMOS mixed signal process. The transceiver can operate at data rates from 1.2 Kb/sec to over 19.2 Kb/sec. The modulation used is On/Off Keying. Key features of the transceiver are integrated dual receiver chains that provide antenna diversity and a quick start capability, which can significantly reduce power consumption.

Keywords

CMOS digital integrated circuits; amplitude shift keying; antennas; integrated circuit design; mixed analogue-digital integrated circuits; radio access networks; transceivers; 0.35 micron; 433 MHz; CMOS mixed signal process; CMOS wireless transceiver integrated circuit; antenna diversity; datarate integrated wireless transceiver; integrated dual receiver chains; power consumption; semiconductors; Ambient intelligence; CMOS integrated circuits; CMOS process; Costs; Energy consumption; Receiving antennas; Signal design; Signal processing; System performance; Transceivers;

fLanguage

English

Publisher

ieee

Conference_Titel

University/Government/Industry Microelectronics Symposium, 2003. Proceedings of the 15th Biennial

ISSN

0749-6877

Print_ISBN

0-7803-7972-1

Type

conf

DOI

10.1109/UGIM.2003.1225699

Filename

1225699