DocumentCode :
1961759
Title :
A flexible, clockless digital filter
Author :
Vezyrtzis, Christos ; Weiwei Jiang ; Nowick, Steven M. ; Tsividis, Yannis
Author_Institution :
Dept. of Electr. Eng., Columbia Univ. in the City of New York, New York, NY, USA
fYear :
2013
fDate :
16-20 Sept. 2013
Firstpage :
65
Lastpage :
68
Abstract :
This paper presents a clockless digital filter able to process inputs of different rates and formats, synchronous or asynchronous, with no adjustment needed to handle each input type. The 16-tap, 8-bit FIR filter, integrated in a 130 nm CMOS process, includes on-chip automatic delay tuning. The chip was used as part of a ADC/DSP/DAC chain which, unlike the case with conventional, clocked systems, maintains its frequency response intact when the sample rate changes. For certain inputs, the system has signal-to-error ratio which exceeds that of clocked systems.
Keywords :
CMOS digital integrated circuits; FIR filters; analogue-digital conversion; circuit tuning; digital signal processing chips; digital-analogue conversion; flexible electronics; ADC-DSP-DAC chain; CMOS process; FIR filter; flexible clockless digital filter; frequency response; on-chip automatic delay tuning; size 130 nm; Clocks; Delays; Digital signal processing; Modulation; Phase change materials; Synchronization; Tuning;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ESSCIRC (ESSCIRC), 2013 Proceedings of the
Conference_Location :
Bucharest
ISSN :
1930-8833
Print_ISBN :
978-1-4799-0643-7
Type :
conf
DOI :
10.1109/ESSCIRC.2013.6649073
Filename :
6649073
Link To Document :
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