Fault-tolerant communication in invasive networks on chip

Dependability and fault tolerance will play an ever increasing role when using future technology nodes. The paper presents a fault-tolerance strategy for invasive networks on chip (i-NoC). The strategy focuses on permanent faults, resulting from either process fluctuations or aging effects and briefly outlines counter measurements against transient faults. We propose a scalable scheme for detection and localization of defects in NoCs. The localization scheme is used as a basis for disabling faulty routers. We propose a transparent bypass scheme to circumvent faulty routers and regions. It uses an architecture extension in the form of an additional lightweight network layer. The fault tolerance layer can be configured at run time according to the current fault map of the architecture. The presented evaluations analyze the fault coverage of the proposed detection and localization strategy. We also investigate the implementation cost and performance impact of the fault tolerance network layer.