Energy efficient frame-level redundancy scrubbing technique for SRAM-based FPGAs

Reliability is a major design constraint for critical applications. SRAM-based FPGAs are attractive to critical applications due to their high performance and flexibility. However, they are high susceptible to radiation effects such as soft errors. Memory scrubbing is an effective method to correct soft errors in SRAM memories but it imposes an overhead in terms of logic area and energy consumption. This work proposes a novel scrubbing technique using internal frame redundancy called Frame-level Redundancy Scrubbing (FLR-scrubbing) with minimum energy consumption overhead without compromising the correction capabilities. As a case study, the FLR-scrubbing controller was implemented on a mid-size Xilinx Virtex-5 FPGA device, occupying 8% of available slices and consumes six times less energy per scrubbed frame than a classic blind scrubber.