DocumentCode :
1962165
Title :
Testing of metal gate PMOS digital integrated circuits
Author :
Fuller, Lynn F. ; Hoomkwap, Kekuut ; Shakya, Sushil ; Yenrudee, Suebphong
Author_Institution :
Microelectron. Eng., Rochester Inst. of Technol., NY, USA
fYear :
2003
fDate :
30 June-2 July 2003
Firstpage :
170
Lastpage :
173
Abstract :
Many universities use the metal gate PMOS process for educational laboratory projects in the fabrication of integrated circuits. A semiconductor parameter analyzer is often used for testing the transistors, resistors and inverters on their test chips. The semiconductor parameter analyzer cannot be used for testing a digital circuit with a large number of inputs and outputs. A low cost digital circuit tester has been created using a personal computer and additional boards for output and input. Lab View software was used to create a graphical interface with the test system. The test system has been used to functionally test multiplexers, demultiplexers, full-adders and other digital integrated circuits. The test system generates a plot of input and output voltages versus time very similar to a digital circuit simulator output.
Keywords :
MOS digital integrated circuits; adders; demultiplexing; integrated circuit testing; laboratories; multiplexing; demultiplexers; digital circuit; digital circuit tester; educational laboratory projects; full-adders; graphical interface; inverters; metal gate PMOS digital integrated circuits; resistors; test chips; test multiplexers; transistors; Circuit testing; Digital circuits; Digital integrated circuits; Educational institutions; Fabrication; Integrated circuit testing; Laboratories; Resistors; Semiconductor device testing; System testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
University/Government/Industry Microelectronics Symposium, 2003. Proceedings of the 15th Biennial
ISSN :
0749-6877
Print_ISBN :
0-7803-7972-1
Type :
conf
DOI :
10.1109/UGIM.2003.1225720
Filename :
1225720
Link To Document :
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