• DocumentCode
    1962293
  • Title

    Design of a high speed SoC platform for cipher processing

  • Author

    Jun, Ji Xiang ; Fu, Xu Jin ; Bin, Dai Zi ; Wei, Li

  • Author_Institution
    Inst. of Inf. Technol., Zhengzhou, China
  • Volume
    3
  • fYear
    2012
  • fDate
    20-21 Oct. 2012
  • Firstpage
    130
  • Lastpage
    133
  • Abstract
    Focusing on the flexibility and speed deficiency of the existing SoC platform, this paper designs a high speed and high flexibility cipher SoC platform. This platform integrates a co-processor to process the cipher operation, which can run the most block and stream cipher algorithms. To solve the problems of data encryption and transmission, the paper designs a high speed communication interface called user-defined interface and proposes a DMA data encryption and transmission mechanism facing the cipher processing. This platform has been verified by the FPGA, and the result shows that this platform can fast run the needed cipher operation correctly and has a high throughput.
  • Keywords
    cryptography; field programmable gate arrays; logic design; system-on-chip; DMA data encryption; FPGA; block cipher algorithms; cipher processing; co-processor; data transmission; high speed SoC platform design; high speed communication interface; stream cipher algorithms; transmission mechanism; user-defined interface; Biological system modeling; Cryptography; DMA; cipher SoC; data encryption and transmission; user-defined interface;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Information Management, Innovation Management and Industrial Engineering (ICIII), 2012 International Conference on
  • Conference_Location
    Sanya
  • Print_ISBN
    978-1-4673-1932-4
  • Type

    conf

  • DOI
    10.1109/ICIII.2012.6339937
  • Filename
    6339937