• DocumentCode
    1962609
  • Title

    A planner 6.3 nm thin-body SOI MOSFET using tunnel epitaxy and nitrided gate oxides

  • Author

    Ahmed, Shibly S. ; Neudeck, Gerold W. ; Denton, John P. ; Stidham, Mark E.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA
  • fYear
    2003
  • fDate
    30 June-2 July 2003
  • Firstpage
    280
  • Lastpage
    283
  • Abstract
    A single-gate UTB SOI MOSFET was fabricated using tunnel epitaxy to form the silicon channel as thin as 6.3 nm. Experimental electrical measurements were conducted on a variety of devices, and the results are summarized. Low leakage currents were measured including gate leakage of 15 pA and device leakage of 1.1 pA. Measured I□V characteristics also included subthreshold slopes of 67 mV/dec., DIBL of 10 mV/V, and drive currents up to 280□A.
  • Keywords
    MOSFET; leakage currents; silicon-on-insulator; thin film transistors; 1.1 pA; 15 pA; 6.3 nm; I-V characteristics; Si-SiO2; device leakage current; drive currents; gate leakage current; nitrided gate oxides; silicon channel; subthreshold slopes; tunnel epitaxy; ultra thin body SOI MOSFET; Current measurement; Doping; Electric variables measurement; Epitaxial growth; Fabrication; Gate leakage; Grain boundaries; Leakage current; MOSFET circuits; Silicon;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    University/Government/Industry Microelectronics Symposium, 2003. Proceedings of the 15th Biennial
  • ISSN
    0749-6877
  • Print_ISBN
    0-7803-7972-1
  • Type

    conf

  • DOI
    10.1109/UGIM.2003.1225743
  • Filename
    1225743