Title :
A new hierarchical genetic algorithm for low-power network on chip design
Author :
Qi, Jinqing ; Zhao, Hanqing ; Wang, Jing ; Li, Zhengxue
Author_Institution :
Sch. of Inf. & Commun. Eng., Dalian Univ. of Technol., Dalian, China
Abstract :
A new hierarchical genetic algorithm for low-power network on chip (NoC) design is proposed in this paper. As 2D-mesh is a widely used NoC topology, this paper studies the optimization of mapping IP (intellectual property) cores onto regular and irregular 2D-mesh network while minimizing communication power consumption. Experimental results show that significant energy savings can be achieved. For instance, for a given application, up to 39% energy savings have been observed.
Keywords :
genetic algorithms; integrated circuit design; low-power electronics; network-on-chip; 2D-mesh; NoC topology; communication power consumption; genetic algorithm; intellectual property; low-power network on chip design; Convergence; IP networks; Next generation networking; Pediatrics; Power demand; System-on-a-chip; Topology;
Conference_Titel :
Intelligent Control and Information Processing (ICICIP), 2010 International Conference on
Conference_Location :
Dalian
Print_ISBN :
978-1-4244-7047-1
DOI :
10.1109/ICICIP.2010.5565289
