A semantics of UML state-machines using synchronous pre-order transition systems

The synchronous model of concurrency has demonstrated its practicality for the design of circuits, embedded systems, reactive and distributed systems. This model allows to design systems around an idealized notion of deterministic concurrency, which is much easier to deal with than classical, nondeterministic, asynchronous concurrency. Compiling, optimizing, and verifying programs are done using powerful techniques. We take advantage of this rich background by presenting a translation of UML state-machines into a pivot synchronous calculus, based on mathematical notions of pre-orders, in the aim of providing an integrated development cycle for the reliable deployment of synchronous system specifications over asynchronous networks. In this paper we first present the structure of UML state-machines. Compared with earlier studies on that matter the structure under consideration supports, e.g., composite transition and history. Then, we give a brief presentation of the pivot formalism, BDL, which is used to finally give a formal semantics of UML state-machines in terms of pre-ordered transition systems