DocumentCode
1963505
Title
Input pattern classification for detection of stuck-ON and bridging faults using IDDQ testing in BiCMOS and CMOS circuits
Author
Menon, Sankaran M. ; Malaiya, Yashwant K. ; Jayasumana, Anura P.
Author_Institution
Dept. of Electr. & Comput. Eng., South Dakota Sch. of Mines & Technol., Rapid City, SD, USA
fYear
1997
fDate
4-7 Jan 1997
Firstpage
545
Lastpage
546
Abstract
Quiescent power supply current monitoring (IDDQ) has been shown to be effective for testing CMOS devices. BiCMOS is emerging as a major technology for high speed, high performance, digital and mixed signal applications. Stuck-ON faults as well as bridging faults in BiCMOS circuits cause enhanced IDDQ. An input pattern classification scheme is presented for detection of stuck-ON/bridging faults causing enhanced IDDQ. This technique can also be used for detecting IDDQ related faults in CMOS circuits
Keywords
BiCMOS digital integrated circuits; BiCMOS logic circuits; CMOS logic circuits; automatic testing; fault diagnosis; integrated circuit testing; logic testing; BiCMOS circuits; CMOS circuits; IDDQ testing; bridging faults; enhanced IDDQ; input pattern classification; quiescent power supply current monitoring; stuck-ON faults; BiCMOS integrated circuits; CMOS technology; Circuit faults; Circuit testing; Current supplies; Electrical fault detection; Fault detection; Monitoring; Pattern classification; Power supplies;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Design, 1997. Proceedings., Tenth International Conference on
Conference_Location
Hyderabad
ISSN
1063-9667
Print_ISBN
0-8186-7755-4
Type
conf
DOI
10.1109/ICVD.1997.568205
Filename
568205
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