A 1.9/2.4GHz dual band CMOS power amplifier with integrated AM-PM distortion canceller

Author

Onizuka, K. ; Isihara, H. ; Hosoya, M. ; Saigusa, S. ; Watanabe, O. ; Otaka, S.

Author_Institution

Corp. R&D Center, Toshiba Corp., Kawasaki, Japan

fYear

2011

fDate

19-21 Sept. 2011

Firstpage

1

Lastpage

4

Abstract

A transformer-based dual band watt-level linear CMOS power amplifier is demonstrated for upcoming SDR mobile terminals. The proposed AM-PM distortion canceller improves ACLR of 3GPP WCDMA uplink signal by 2.6dB at 28.0dBm output power, and the designed interstage power distributor contributes to low-loss power supply for the driver stage and high common-mode stability. Moreover, a newly developed cascode biasing circuit guarantees AM-AM linearity of the PA in a wide supply voltage range from 2.5V to 3.6V. The test chip demonstrates peak output powers of 28.3dBm at 1.95GHz and 23.7dBm at 2.4GHz satisfying 3GPP WCDMA and IEEE802.11g spectrum masks with die area of 5.4mm².

Keywords

CMOS analogue integrated circuits; UHF amplifiers; distortion; power amplifiers; transformers; 3GPP WCDMA uplink signal; ACLR; SDR mobile terminals; driver stage; frequency 1.9 GHz; frequency 1.95 GHz; frequency 2.4 GHz; gain 2.6 dB; high common-mode stability; integrated AM-PM distortion canceller; low-loss power supply; transformer-based dual band watt-level linear CMOS power amplifier; voltage 2.5 V to 3.6 V; CMOS integrated circuits; Distortion measurement; Multiaccess communication; Power amplifiers; Power generation; Semiconductor device measurement; Spread spectrum communication;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference (CICC), 2011 IEEE

Conference_Location

San Jose, CA

ISSN

0886-5930

Print_ISBN

978-1-4577-0222-8

Type

conf

DOI

10.1109/CICC.2011.6055282

Filename

6055282