DocumentCode :
1963917
Title :
WLCSP back-end considerations
Author :
Tessier, T.G. ; Shin, WS ; Yuen, YK ; Do, BT ; Kuan, F. ; Ling, J.
Author_Institution :
ST Assembly Test Services Inc., Tempe, AZ, USA
fYear :
2003
fDate :
16-18 July 2003
Firstpage :
181
Lastpage :
185
Abstract :
The rapid adoption of WLCSPs in a wide range of form factor sensitive packaging applications is underway. To date, the pace of this technology deployment has been slowed by the absence of a robust infrastructure to enable its availability in high volumes. This paper will highlight some of the issues associated with the current WLCSP supply base and efforts that are underway to put in place full turn-key services to support this packaging technology.
Keywords :
chip scale packaging; semiconductor technology; wafer bonding; automatic optical inspection; packaging applications; packaging technology; semiconductor technology; wafer bonding; wafer level chip scale packaging; Assembly; Availability; Current supplies; Dielectrics; Flip chip; Integrated circuit interconnections; Robustness; Routing; Semiconductor device packaging; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics Manufacturing Technology Symposium, 2003. IEMT 2003. IEEE/CPMT/SEMI 28th International
ISSN :
1089-8190
Print_ISBN :
0-7803-7933-0
Type :
conf
DOI :
10.1109/IEMT.2003.1225896
Filename :
1225896
Link To Document :
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