DocumentCode :
1964125
Title :
Reducing the cost of package Test
Author :
Shakeri, Saeed R.
Author_Institution :
Adv. Interconnect Technol. Inc., Pleasanton, CA, USA
fYear :
2003
fDate :
16-18 July 2003
Firstpage :
225
Lastpage :
229
Abstract :
It is no secret that semiconductor manufacturers in today´s marketplace face intense pressure to reduce cost while improving quality. However, package test remains an area that is often overlooked in cost-saving initiatives. In this session, you will learn about the elements that make up the total cost of packaging test and discover new ways to reduce costs, such as design for testability. The session will also describe how to optimize use of automatic test equipment (ATE) and determine the most effective test site strategy.
Keywords :
automatic test equipment; cost reduction; design for testability; integrated circuit testing; semiconductor device manufacture; ATE; automatic test equipment; cost reduction; cost saving initiatives; design for testability; marketplace face intense pressure; package test; semiconductor manufacturers; test site strategy; Assembly; Automatic testing; Circuit testing; Costs; Profitability; Semiconductor device manufacture; Semiconductor device packaging; Semiconductor device testing; Software testing; Throughput;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics Manufacturing Technology Symposium, 2003. IEMT 2003. IEEE/CPMT/SEMI 28th International
ISSN :
1089-8190
Print_ISBN :
0-7803-7933-0
Type :
conf
DOI :
10.1109/IEMT.2003.1225905
Filename :
1225905
Link To Document :
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