A 75 MHz BW 68dB DR CT-ΣΔ modulator with single amplifier biquad filter and a broadband low-power common-gate summing technique

A wide bandwidth, power efficient continuous-time ΣΔ modulator (CTΣΔM) is presented. The modulator introduces a 3^rd order filter implemented with a lossless integrator and a multiple-feedback (MFB) single-amplifier biquad (SAB) with embedded loop stability compensation. An active summing block is implemented with a common-gate amplifier followed by a transimpedance amplifier (TIA) that achieves optimum bandwidth (BW) vs power consumption tradeoff, making it suitable for over GHz operation. Fabricated in 40 nm CMOS, and clocked at 3.2 GHz, the CTΣΔM achieves a signal-to-noise and distortion ratio (SNDR) of 64.9 dB over 75 MHz BW while consuming 22.8 mW of power. The obtained Walden´s Figure of Merit (FoM) is 106 fJ/conv-step.