Title :
14nm FinFET based supply voltage boosting techniques for extreme low Vmin operation
Author :
Joshi, R.V. ; Ziegler, M. ; Wetter, H. ; Wandel, C. ; Ainspan, H.
Author_Institution :
IBM, Yorktown Heights, NY, USA
Abstract :
This paper presents new dynamic supply and interconnect boosting techniques for low voltage SRAMs and logic in deep 14nm FinFET technologies. The capacitive coupling in a FinFET device is used to dynamically boost the virtual logic and array supply voltage, improving Vmin. Hardware measurements show a 2.5-3x access time improvement at lower voltages and a functional Vmin down to 0.3V. Results are supported by novel physics-based capacitance extraction and novel superfast statistical circuit simulations.
Keywords :
MOSFET; SRAM chips; logic devices; FinFET based supply voltage boosting techniques; FinFET device; array supply voltage; capacitive coupling; low voltage SRAM; supply and interconnect boosting techniques; virtual logic; voltage 0.3 V; Arrays; Boosting; FinFETs; Frequency measurement; Integrated circuit interconnections; Logic gates; Low voltage;
Conference_Titel :
VLSI Circuits (VLSI Circuits), 2015 Symposium on
Conference_Location :
Kyoto
Print_ISBN :
978-4-86348-502-0
DOI :
10.1109/VLSIC.2015.7231283