Design of a minimum temperature drift JFET differential amplifier

Author

Rizkalla, Maher E. ; Holdma, Michael M. ; Barton, Ross A.

Author_Institution

Dept. of Electr. Eng., Purdue Univ., Indianapolis, IN, USA

fYear

1989

fDate

14-16 Aug 1989

Firstpage

439

Abstract

The temperature drift of a JFET (junction field-effect transistor) differential amplifier circuit is studied to determine the biasing conditions necessary to operate at zero temperature coefficient. Theoretical expressions for the currents and voltages at this point are determined. PSPICE results show close agreement with those obtained experimentally over a wide range of temperatures. Two methods for minimizing drift are investigated. A biasing method resulted in a drift of ~25 μV/°C over the range 25-50°C. In the second method, using microprocessor control circuits, a drift of <10 μV/°C was obtained over the range of 25-85°C

Keywords

computerised control; differential amplifiers; electronic engineering computing; junction gate field effect transistors; microcomputer applications; network synthesis; 25 to 85 degC; JFET differential amplifier; PSPICE results; bias point method; biasing conditions; junction field-effect transistor; microprocessor control circuits; minimum temperature drift; zero temperature coefficient; Bipolar transistors; Circuit stability; Differential amplifiers; Digital control; Equations; JFET circuits; Microprocessors; SPICE; Temperature; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1989., Proceedings of the 32nd Midwest Symposium on

Conference_Location

Champaign, IL

Type

conf

DOI

10.1109/MWSCAS.1989.101885

Filename

101885