Title :
An Efficient Denoising Architecture for Removal of Impulse Noise in Images
Author :
Chih-Yuan Lien ; Chien-Chuan Huang ; Pei-Yin Chen ; Yi-Fan Lin
Author_Institution :
Dept. of Electron. Eng., Nat. Kaohsiung Univ. of Appl. Sci., Kaohsiung, Taiwan
Abstract :
Images are often corrupted by impulse noise in the procedures of image acquisition and transmission. In this paper, we propose an efficient denoising scheme and its VLSI architecture for the removal of random-valued impulse noise. To achieve the goal of low cost, a low-complexity VLSI architecture is proposed. We employ a decision-tree-based impulse noise detector to detect the noisy pixels, and an edge-preserving filter to reconstruct the intensity values of noisy pixels. Furthermore, an adaptive technology is used to enhance the effects of removal of impulse noise. Our extensive experimental results demonstrate that the proposed technique can obtain better performances in terms of both quantitative evaluation and visual quality than the previous lower complexity methods. Moreover, the performance can be comparable to the higher,- complexity methods. The VLSI architecture of our design yields a processing rate of about 200 MHz by using TSMC 0.18 μm technology. Compared with the state-of-the-art techniques, this work can reduce memory storage by more than 99 percent. The design requires only low computational complexity and two line memory buffers. Its hardware cost is low and suitable to be applied to many real-time applications.
Keywords :
VLSI; computational complexity; decision trees; image denoising; image reconstruction; impulse noise; object detection; TSMC technology; VLSI architecture; adaptive technology; computational complexity; decision-tree-based impulse noise detector; edge-preserving filter; frequency 200 MHz; image acquisition; image denoising architecture; image transmission; line memory buffers; noisy pixel detection; noisy pixel intensity values reconstruction; quantitative evaluation; random-valued impulse noise removal; size 0.18 mum; visual quality; Computer architecture; Detectors; Image edge detection; Noise; Noise measurement; Noise reduction; Very large scale integration; Image denoising; architecture; impulse detector; impulse noise;
Journal_Title :
Computers, IEEE Transactions on
DOI :
10.1109/TC.2011.256