Title :
SOI CMOS with high-performance passive components for analog, RF, and mixed signal design
Author :
Stuber, M. ; Megahed, M. ; Lee, J.J. ; Kobayashi, T. ; Domyo, H.
Author_Institution :
Peregrine Semicond. Corp., San Diego, CA, USA
Abstract :
Summary form only given. Peregrine Semiconductor\´s UTSi/sup R/ silicon-on-sapphire (SOS) CMOS process is unique because it has a fully insulating substrate. This enables the design of higher performance resistors, capacitors, and inductors. The UTSi process consists of a thin (100 nm) "improved" silicon epitaxial layer on single crystal sapphire with dual polysilicon capacitors and three layers of Al metallization. All processing is standard CMOS processing for high manufacturability and reliability. The UTSi technology takes advantage of the sapphire substrate to improve resistor and inductor characteristics for high-performance analog and RF applications. Resistors with low parasitic capacitance, low TCR, and low voltage coefficients simplify the design of analog circuits. Highly linear double-poly capacitors also enable higher performance analog and RF design. The presence of high-Q inductors and capacitors and excellent isolation of the insulating substrate allow fully integrated MMICs to be designed in UTSi technology. These characteristics make UTSi an ideal technology for analog, RF integration, and mixed-signal products.
Keywords :
CMOS integrated circuits; analogue integrated circuits; capacitors; field effect MMIC; inductors; integrated circuit design; integrated circuit interconnections; integrated circuit metallisation; integrated circuit reliability; mixed analogue-digital integrated circuits; resistors; silicon-on-insulator; 100 nm; Al; CMOS processing; RF design; SOI CMOS; Si-Al/sub 2/O/sub 3/; UTSi SOS CMOS process; UTSi process; UTSi silicon-on-sapphire CMOS process; UTSi technology; analog circuits; analog design; capacitors; dual polysilicon capacitors; fully insulating substrate; fully integrated MMICs; high-Q capacitors; high-Q inductors; inductor characteristics; inductors; insulating substrate isolation; linear double-poly capacitors; manufacturability; mixed signal design; mixed-signal products; multilayer Al metallization; parasitic capacitance; passive components; reliability; resistor TCR; resistor characteristics; resistor voltage coefficients; resistors; sapphire substrate; silicon epitaxial layer; single crystal sapphire; CMOS process; Capacitors; Inductors; Insulation; Integrated circuit technology; Isolation technology; Radio frequency; Resistors; Silicon on insulator technology; Substrates;
Conference_Titel :
SOI Conference, 1998. Proceedings., 1998 IEEE International
Conference_Location :
Stuart, FL, USA
Print_ISBN :
0-7803-4500-2
DOI :
10.1109/SOI.1998.723130
