Run–time Control of Subthreshold Current using Double–Gate Device Technology

The close link between power and performance represents a significant hurdle to the design of portable embedded systems. As supply voltage falls, thereby saving dynamic power, the impact of threshold voltage on delay becomes greater so that it will become increasingly difficult to set a fixed threshold voltage that optimizes both performance and static power. This paper proposes a method around these conflicting requirements by allowing threshold voltages to be dynamically adjusted at run time via back-gate control on thin-body double-gate Silicon on Insulator (TBDGSOI) transistors. Using a multi-level simulation approach, with SPICE and VHDL-AMS, and using a small RISC microprocessor architecture as an example, it is shown that reductions in subthreshold leakage of between 6X and 11X can be achieved using this run-time control technique under a number of small software workloads.