FPGA Implementation of a Real Time Maximum Likelihood Space-Time Decoder on a MIMO Software Radio Test Platform

Author

Green, Peter J. ; Taylor, Desmond P.

Author_Institution

Dept. of Electr. & Comput. Eng., Univ. of Canterbury, Christchurch, New Zealand

fYear

2010

fDate

13-15 Jan. 2010

Firstpage

139

Lastpage

143

Abstract

This paper describes the concept, architecture, development and demonstration of a real time, maximum likelihood Alamouti decoder for a wireless 4-transmit 4-receiver multiple input and multiple output (MIMO) Smart Antenna Software Radio Test System (SASRATS) platform. It is implemented on a Xilinx Virtex 2 Pro Field Programmable Gate Array (FPGA).Hardware, firmware, use of the Xilinx Core Generator Intellectual Property modules and experimental verification of the decoder are discussed.

Keywords

MIMO communication; adaptive antenna arrays; field programmable gate arrays; maximum likelihood decoding; software radio; space-time codes; Alamouti decoder; FPGA implementation; MIMO software radio test platform; SASRATS platform; field programmable gate array; real time maximum likelihood space time decoder; smart antenna software radio test system; xilinx core generator intellectual property modules; xilinx virtex 2 pro; Computer architecture; Field programmable gate arrays; Intellectual property; MIMO; Maximum likelihood decoding; Microprogramming; Real time systems; Software radio; Software testing; System testing; Alamouti; FPGA; MIMO; maximum likelihood decoder; real-time implementation; software radio test platform;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronic Design, Test and Application, 2010. DELTA '10. Fifth IEEE International Symposium on

Conference_Location

Ho Chi Minh City

Print_ISBN

978-0-7695-3978-2

Electronic_ISBN

978-1-4244-6026-7

Type

conf

DOI

10.1109/DELTA.2010.9

Filename

5438700