• DocumentCode
    1966018
  • Title

    Design for diagnosability guidelines

  • Author

    Ungar, Louis Y.

  • Author_Institution
    A.T.E. Solutions Inc., Los Angeles
  • fYear
    2007
  • fDate
    17-20 Sept. 2007
  • Firstpage
    6
  • Lastpage
    15
  • Abstract
    The concept of design for diagnosability (DfD) is introduced as a different concept than design for testability (DfT). Separating design for diagnosability guidelines from those of the more general design for testability guidelines enables circuit designers to distinguish between those guidelines that separate good circuits from faulty ones and guidelines that are aimed at improving the repair process. Comprehensive fault detection does not result in cost effective repair without unambiguous fault isolation. A model is used to demonstrate the distinctions between test and diagnostic goals. Diagnoses related terminology is introduced and diagnostic complications are discussed. Hidden faults, cannot duplicates (CNDs), retest OK, fault isolation ambiguity, false remedies and false alarms are explored in great detail. A Venn diagram model is used to further explain Diagnosability and the diagnostic complications. The term Distinguishability is added to our vocabulary as the positive dual of ambiguity. The paper probes the possible causes of the various diagnostic issues and provides guidelines designers can incorporate to eliminate them. The paper offers specific design guidelines to achieve a more diagnosable or diagnostic-friendly circuit design. In doing so, diagnostic complications can be reduced, resulting in lower cost repairs and maintenance.
  • Keywords
    design for testability; fault diagnosis; integrated circuit design; integrated circuit testing; Venn diagram model; cannot duplicates; circuit designers; design for diagnosability; design for testability; diagnosability guidelines; diagnostic complications; distinguishability; false alarms; false remedies; fault detection; fault isolation ambiguity; faulty circuits; good circuits; hidden faults; repair process; retest OK; testability guidelines; unambiguous fault isolation; Circuit faults; Circuit testing; Costs; Design for disassembly; Design for testability; Electrical fault detection; Guidelines; Probes; Terminology; Vocabulary;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Autotestcon, 2007 IEEE
  • Conference_Location
    Baltimore, MD
  • ISSN
    1088-7725
  • Print_ISBN
    978-1-4244-1239-6
  • Electronic_ISBN
    1088-7725
  • Type

    conf

  • DOI
    10.1109/AUTEST.2007.4374195
  • Filename
    4374195