• DocumentCode
    1966040
  • Title

    A 256/spl times/256 CMOS differential passive pixel imager with FPN reduction techniques

  • Author

    Fujimori, I.L. ; Ching-Chun Wang ; Sodini, C.G.

  • Author_Institution
    MIT, Cambridge, MA, USA
  • fYear
    2000
  • fDate
    9-9 Feb. 2000
  • Firstpage
    106
  • Lastpage
    107
  • Abstract
    Passive pixel sensors provide an alternative to the conventional active pixel sensor (APS) for high-density CMOS imaging arrays. Similar to the history of the single-transistor DRAM cell, this one-transistor pixel cell has one main advantage over the APS. It has high fill-factor in a smaller area, leading to a high-density array of pixels with high quantum efficiency. Experiments reveal a major weakness in passive pixels is a signal-dependent parasitic current that can contaminate charge signals in different parts of the array. The origin of this parasitic current is explained here. A correlated double sampling (CDS) circuit in a differential architecture removes its effects.
  • Keywords
    CMOS image sensors; integrated circuit noise; 256 pixel; CMOS passive pixel image sensor; correlated double sampling circuit; differential architecture; fill factor; fixed pattern noise; high-density array; parasitic current; quantum efficiency; CMOS image sensors; Capacitors; Circuits; Feedback; Photodiodes; Pixel; Pulse amplifiers; Sensor arrays; Switches; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 2000. Digest of Technical Papers. ISSCC. 2000 IEEE International
  • Conference_Location
    San Francisco, CA, USA
  • ISSN
    0193-6530
  • Print_ISBN
    0-7803-5853-8
  • Type

    conf

  • DOI
    10.1109/ISSCC.2000.839711
  • Filename
    839711