Title :
A Low-Power Associative Processor with the R-th Nearest-Match Hamming-Distance Search Engine Employing Time-Domain Techniques
Author :
Bui, Trong Tu ; Shibata, Tadashi
Author_Institution :
Fac. of Electron. & Telecommun., Univ. of Sci.-HCM City, Hochiminh City, Vietnam
Abstract :
In this paper, a low-power Hamming distance associative processor employing time-domain techniques has been developed focusing on the implementation of an r-th nearest-match location identification function. The architecture not only inherits advantages of analog implementations on power consumption but also improves the accuracy of such implementations. This is because it employs digital technique for distance comparison and delay-time technique for searching for the r-th nearest-match template word. A 64-bit 32-word proof-of-concept chip has been designed and fabricated in a 0.18-¿m CMOS process and has been successfully tested. Power consumption is below 1.8 mW and core size is 0.65 × 0.445 mm2, respectively.
Keywords :
CMOS digital integrated circuits; content-addressable storage; search engines; time-domain analysis; CMOS process; R-th nearest-match hamming-distance search engine; content-addressable memory; delay-time technique; digital technique; distance comparison; low-power associative processor; power 1.8 mW; r-th nearest-match location identification function; size 0.18 mum; time domain techniques; CADCAM; Circuits; Cities and towns; Computer aided manufacturing; Delay; Electronic equipment testing; Energy consumption; Hamming distance; Search engines; Time domain analysis; CAM; Hamming distance; ROF; associative processor; time-domain techniques;
Conference_Titel :
Electronic Design, Test and Application, 2010. DELTA '10. Fifth IEEE International Symposium on
Conference_Location :
Ho Chi Minh City
Print_ISBN :
978-0-7695-3978-2
Electronic_ISBN :
978-1-4244-6026-7
DOI :
10.1109/DELTA.2010.37
