DocumentCode
1966095
Title
A 1.0V 45nm nonvolatile magnetic latch design and its robustness analysis
Author
Wang, Peiyuan ; Chen, Xiang ; Chen, Yiran ; Li, Hai ; Kang, Seung ; Zhu, Xiaochun ; Wu, Wenqing
Author_Institution
Univ. of Pittsburgh, Pittsburgh, PA, USA
fYear
2011
fDate
19-21 Sept. 2011
Firstpage
1
Lastpage
4
Abstract
A new nonvolatile latch design is proposed based on the magnetic tunneling junction (MTJ) devices. In the standby mode, the latched data can be retained in the MTJs without consuming any power. Two types of operation errors, namely, persistent and non-persistent errors, are quantitatively analyzed by including the process variations and thermal fluctuations during the read and write operations. A design at 45nm technology node is used as the example to discuss the design tradeoffs.
Keywords
MRAM devices; flip-flops; logic design; magnetic logic; magnetic tunnelling; MTJ device; magnetic tunneling junction device; nonpersistent error; nonvolatile magnetic latch design; operation error; persistent error; robustness analysis; size 45 nm; thermal fluctuation; voltage 1.0 V; Error analysis; Latches; Magnetic tunneling; Nonvolatile memory; Sensors; Switches; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
Custom Integrated Circuits Conference (CICC), 2011 IEEE
Conference_Location
San Jose, CA
ISSN
0886-5930
Print_ISBN
978-1-4577-0222-8
Type
conf
DOI
10.1109/CICC.2011.6055392
Filename
6055392
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