• DocumentCode
    1966185
  • Title

    Phase-state low electron-number drive random access memory (PLEDM)

  • Author

    Nakazato, K. ; Itoh, K. ; Ahmed, H. ; Mizuta, H. ; Kisu, T. ; Kato, M. ; Sakata, T.

  • Author_Institution
    Hitachi Eur. Ltd., Cambridge, UK
  • fYear
    2000
  • fDate
    9-9 Feb. 2000
  • Firstpage
    132
  • Lastpage
    133
  • Abstract
    Dynamic random access memories (DRAMs) based on a transistor/capacitor cell are used as main memories in computers because of their high capacity and high speed. Since there is no gain in the present DRAM cell, it requires a large cell-capacitor to produce an adequate sense signal. In each new memory generation, structure and fabrication have become more complicated to maintain a large capacitor while miniaturizing the cell. This phase-state low electron-number drive memory (PLEDM) gain cell uses a stacked tunnel transistor (PLEDTR). Since this cell has gain, a large capacitor is not necessary. The cell size is 5F/sup 2/ where F is the minimum feature size. Its read and write times are simulated as 20ns and 5ns, respectively. In principle, it is possible with PLEDM to have a retention time longer than 10 years, enabling a nonvolatile memory to be realised.
  • Keywords
    MOS memory circuits; random-access storage; tunnel transistors; 20 ns; 5 ns; cell size; gain cell; nonvolatile memory; phase-state low electron-number drive memory; read times; retention time; stacked tunnel transistor; write times; Capacitors; Electrons; Europe; Leakage current; MOSFET circuits; Random access memory; Semiconductor impurities; Silicon compounds; Threshold voltage; Ultra large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 2000. Digest of Technical Papers. ISSCC. 2000 IEEE International
  • Conference_Location
    San Francisco, CA, USA
  • ISSN
    0193-6530
  • Print_ISBN
    0-7803-5853-8
  • Type

    conf

  • DOI
    10.1109/ISSCC.2000.839719
  • Filename
    839719