Duty cycle dependent pulsed IV simulation and thermal time constant model fitting for LDMOS transistors

A pulsed simulation approach is demonstrated for prediction of duty-cycle dependent thermal effects in transistors. Also a novel method is shown for fitting and/or validating electro-thermal models using pulsed IV measurements and pulsed IV simulations. A commercial LDMOS device is used to demonstrate the new methods. After extracting the thermal time constant, good agreement is achieved between measured and simulated pulsed IV results under a wide range of different pulse conditions including DC, very short (<0.1%) duty cycles, and varied pulse widths between these extremes. A three-pole electro-thermal equivalent circuit model was shown to improve the model data fitting for intermediate pulse widths.