DocumentCode :
1966396
Title :
A CMOS nested chopper instrumentation amplifier with 100 nV offset
Author :
Bakker, A. ; Thiele, K. ; Huijsing, J.
Author_Institution :
Delft Univ. of Technol., Netherlands
fYear :
2000
fDate :
9-9 Feb. 2000
Firstpage :
156
Lastpage :
157
Abstract :
Offset and 1/f noise have been major enemies for analog IC designers since the enormous increase of the market for digital applications forced them to develop analog front ends in standard CMOS technology. Because static techniques like trimming cannot reduce 1/f noise, solutions had to be found in dynamic offset cancellation. The current work presents an improvement of the chopper amplifier concept, called the nested chopper amplifier. It is shown that with this architecture the residual offset is reduced to <100 nV, while retaining minimal thermal noise in the signal band.
Keywords :
1/f noise; CMOS analogue integrated circuits; choppers (circuits); instrumentation amplifiers; integrated circuit noise; thermal noise; 1/f noise; 100 nV; CMOS technology; dynamic offset cancellation; minimal thermal noise; nested chopper instrumentation amplifier; spinning-current Hall sensor; Analog integrated circuits; Application specific integrated circuits; CMOS analog integrated circuits; CMOS integrated circuits; CMOS technology; Choppers; Instruments; Integrated circuit noise; Noise cancellation; Noise reduction;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 2000. Digest of Technical Papers. ISSCC. 2000 IEEE International
Conference_Location :
San Francisco, CA, USA
ISSN :
0193-6530
Print_ISBN :
0-7803-5853-8
Type :
conf
DOI :
10.1109/ISSCC.2000.839729
Filename :
839729
Link To Document :
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