Title :
Clock generation and distribution for the first IA-64 microprocessor
Author :
Rusu, S. ; Tam, S.
Author_Institution :
Intel Corp., Santa Clara, CA, USA
Abstract :
Increased functionality and performance in today´s microprocessors has resulted in a trend toward larger die sizes and higher operating frequencies. These factors, coupled with larger on-die variations at reduced device geometries, call for special management of the clock distribution skew. The clock generation and distribution for the first IA-64 microprocessor achieves a low skew by using distributed programmable deskew units. Local skew control compensates for load mismatches and within-die process variations, as well as temperature and voltage gradients. In addition, this design supports debug features including on-die clock shrink and test access port (TAP) control of the deskew settings.
Keywords :
clocks; microprocessor chips; IA-64 microprocessor; clock distribution; clock generation; distributed programmable deskew unit; skew control; Circuits; Clocks; Delay lines; Detectors; Digital control; Frequency; Microprocessors; Phase detection; Phase locked loops; Timing;
Conference_Titel :
Solid-State Circuits Conference, 2000. Digest of Technical Papers. ISSCC. 2000 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-5853-8
DOI :
10.1109/ISSCC.2000.839738