DocumentCode :
1966801
Title :
Analysis of shared buffer multistage networks with hot spot
Author :
Saleh, Mahmoud ; Atiquzzaman, Mohammed
Author_Institution :
Dept. of Comput. Sci. & Eng., La Trobe Univ., Melbourne, Vic., Australia
Volume :
2
fYear :
1995
fDate :
19-21 Apr 1995
Firstpage :
799
Abstract :
Multistage interconnection networks based on shared buffering are known to have better performance and buffer utilization than input or output buffered switches. Shared buffer switches do not suffer from head of line blocking which is a common problem in simple input buffering. Shared buffer switches have previously been studied under uniform and unbalanced traffic patterns. However, due to the complexity of the model, the performance of such a network, in the presence of a single hot spot, has not been fully explored. A hot spot arises when one of the outputs of the network becomes very popular. We develop a model for a multistage interconnection network constructed from shared buffer switching elements and operating under a hot spot traffic pattern. The model is validated by comparison with simulation results. The model is used to study the network performance in terms of the throughput, packet delay, packet loss probability and the optimal buffer utilization, Numerical results show that, in the presence of hot spot traffic, shared buffer switches degrade more significantly than switches with dedicated input and/or output buffers
Keywords :
buffer storage; multistage interconnection networks; packet switching; performance evaluation; shared memory systems; buffer utilization; hot spot; hot spot traffic pattern; multistage interconnection networks; network outputs; numerical results; optimal buffer utilization; packet delay; packet loss probability; performance; shared buffer multistage networks; shared buffer switches; simulation; throughput; Analytical models; Asynchronous transfer mode; Buffer storage; Communication switching; Multiprocessor interconnection networks; Packet switching; Performance loss; Switches; Telecommunication traffic; Traffic control;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Algorithms and Architectures for Parallel Processing, 1995. ICAPP 95. IEEE First ICA/sup 3/PP., IEEE First International Conference on
Conference_Location :
Brisbane, Qld.
Print_ISBN :
0-7803-2018-2
Type :
conf
DOI :
10.1109/ICAPP.1995.472270
Filename :
472270
Link To Document :
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