Title :
A 200 MHz 0.25 W packet audio terminal processor for voice-over-internet protocol applications
Author :
Martin, B. ; Buckley, I. ; Bednarz, P. ; Chrissan, D. ; Amiri, K. ; Burnett, C. ; Eddington, C. ; Wei Lin ; Maturi, G. ; Subagio, H. ; Teng, G. ; Waite, J. ; Yee-Tuck Yong
Author_Institution :
8/spl times/8 Inc., Santa Clara, CA, USA
Abstract :
Voice-over-internet protocol (VoIP) terminals used in business phone, speakerphone and wireless applications require a low-power integrated solution suitable for the limited chassis area of these devices. This 200 MHz VoIP terminal processor is implemented in a 0.18 /spl mu/m 5-metal-layer CMOS process with 2 Mb of SRAM. The chip contains 16 M transistors in a 6.35/spl times/6.35 mm/sup 2/ die. This processor chip implements a complete VoIP terminal solution from raw digitized handset audio samples to compressed internet protocol (IP) packetized media independent interface (MII) signals.
Keywords :
CMOS digital integrated circuits; Internet telephony; audio signal processing; digital signal processing chips; low-power electronics; protocols; telecommunication terminals; 0.18 micron; 0.25 W; 200 MHz; SRAM; VoIP terminal; low power CMOS chip; media independent interface; packet audio terminal processor; voice-over-internet protocol; Central Processing Unit; Circuit testing; Internet telephony; Phase locked loops; Pipelines; Random access memory; Read only memory; Reduced instruction set computing; Registers; Signal processing;
Conference_Titel :
Solid-State Circuits Conference, 2000. Digest of Technical Papers. ISSCC. 2000 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-5853-8
DOI :
10.1109/ISSCC.2000.839765
