• DocumentCode
    1967124
  • Title

    Using a SAT solver to generate checking sequences

  • Author

    Jourdan, Guy-Vincent ; Ural, Hasan ; Yenigün, Hüsnü ; Zhu, Dong

  • Author_Institution
    Fac. of Eng., Univ. of Ottawa Ottawa, Ottawa, ON, Canada
  • fYear
    2009
  • fDate
    14-16 Sept. 2009
  • Firstpage
    549
  • Lastpage
    554
  • Abstract
    Methods for software testing based on finite state machines (FSMs) have been researched since the early 60´s. Many of these methods are about generating a checking sequence from a given FSM which is an input sequence that determines whether an implementation of the FSM is faulty or correct. In this paper, we consider one of these methods, which constructs a checking sequence by reducing the problem of generating a checking sequence to finding a Chinese rural postman tour on a graph induced by the FSM; we re-formulate the constraints used in this method as a set of Boolean formulas; and use a SAT solver to generate a checking sequence of minimal length.
  • Keywords
    Boolean algebra; computability; finite state machines; formal verification; graph theory; program testing; Boolean formulas; Chinese rural postman tour; FSM; SAT solver; finite state machines; software checking sequences; software testing; Automata; Fault detection; Machine learning; Pattern matching; Protocols; Software testing; Checking Sequences; Disinguishing Sequences; Finite State Machines; SAT Solvers; Software Testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer and Information Sciences, 2009. ISCIS 2009. 24th International Symposium on
  • Conference_Location
    Guzelyurt
  • Print_ISBN
    978-1-4244-5021-3
  • Electronic_ISBN
    978-1-4244-5023-7
  • Type

    conf

  • DOI
    10.1109/ISCIS.2009.5291883
  • Filename
    5291883