Simulated monolithically integrated single photon counter

Author

Cronin, Donal ; Moloney, Aoife M. ; Morrison, Alan P.

Author_Institution

Dept. of Electr. & Electron. Eng., Univ. Coll. Cork, Ireland

fYear

2004

fDate

6-7 Sept. 2004

Firstpage

9

Lastpage

14

Abstract

Simulations of a Geiger-mode avalanche photodiode (GMAP) monolithically integrated with its corresponding active quench and reset circuit (AQRC) are presented. The AQRC design is simulated in Agilent´s ADS simulator using BSIM3 MOSFET models acquired from Europractice´s 0.6 μm CMOS process. The novelty of the design ensures a minimum dead-time of 13 ns between adjacent incident photons. This corresponds to a maximum achievable saturated count-rate of 77 Mcounts/sec, not previously reported.

Keywords

CMOS integrated circuits; avalanche photodiodes; circuit simulation; photodetectors; photon counting; 0.6 micron; 13 ns; AQRC; CMOS process; GMAP; Geiger-mode avalanche photodiode; MOSFET; active quench/reset circuit; adjacent incident photons dead-time; maximum achievable saturated count-rate; monolithically integrated single photon counter; single photon detection; Avalanche photodiodes; CMOS process; Circuit simulation; Counting circuits; Detectors; Educational institutions; Electronic ballasts; Fluorescence; Nonlinear optics; Optical saturation;

fLanguage

English

Publisher

ieee

Conference_Titel

High Frequency Postgraduate Student Colloquium, 2004

Print_ISBN

0-7803-8426-1

Type

conf

DOI

10.1109/HFPSC.2004.1360336

Filename

1360336