A 90 dB SNR, 2.5 MHz output rate ADC using cascaded multibit /spl Delta//spl Sigma/ modulation at 8x oversampling ratio

Author

Fujimori, I. ; Longo, L. ; Hairapetian, A. ; Seiyama, Kazushi ; Kosic, S. ; Cao, J. ; Shu-Iap Chan

Author_Institution

AKM Semicond., San Diego, CA, USA

fYear

2000

fDate

9-9 Feb. 2000

Firstpage

338

Lastpage

339

Abstract

This 16b, 2.5 MHz output rate ADC is intended for xDSL and high-speed instrumentation applications. A fourth-order cascaded /spl Delta//spl Sigma/ modulator (/spl Delta//spl Sigma/M) operating at 20 MHz employs multibit quantization and dynamic element matching (DEM) to make all quantization noise contributions negligible at an oversampling ratio (OSR) of eight. The ADC achieves 90 dB signal-to-noise ratio (SNR) in a 1.25 MHz bandwidth, and 102 dB spurious free dynamic range (SFDR) with 270 mW dissipation.

Keywords

cascade networks; digital subscriber lines; high-speed integrated circuits; integrated circuit noise; quantisation (signal); sigma-delta modulation; 16 bit; 2.5 MHz; 20 MHz; 370 mW; ADC; cascaded multibit sigma-delta modulation; dynamic element matching; high-speed instrumentation; multibit quantization; output rate; oversampling ratio; quantization noise contributions; signal-to-noise ratio; spurious free dynamic range; xDSL; Bandwidth; Circuit noise; Clocks; Delta modulation; Dynamic range; Large Hadron Collider; Noise shaping; Quantization; Semiconductor device noise; Signal to noise ratio;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 2000. Digest of Technical Papers. ISSCC. 2000 IEEE International

Conference_Location

San Francisco, CA, USA

ISSN

0193-6530

Print_ISBN

0-7803-5853-8

Type

conf

DOI

10.1109/ISSCC.2000.839806

Filename

839806