DocumentCode :
1968100
Title :
IC identification circuit using device mismatch
Author :
Lofstrom, K. ; Daasch, W.R. ; Taylor, D.
Author_Institution :
SiidTech., Beaverton, OR, USA
fYear :
2000
fDate :
9-9 Feb. 2000
Firstpage :
372
Lastpage :
373
Abstract :
Non-alterable identification is required for tracking work in progress, detecting part rebranding, radio frequency identification (RFID), IP protection, and transaction validation. Wafer-level techniques such as laser link cutting, and circuit-level EPROM techniques, require expensive machinery or special wafer processing. Integrated circuit identification (ICID) extracts unique and repeatable information from the randomness inherent in silicon processing. No external programming or special process steps are needed, and the technique may be used with any standard submicron CMOS process.
Keywords :
CMOS integrated circuits; VLSI; identification technology; industrial property; integrated circuit manufacture; IC identification circuit; IP protection; circuit-level EPROM techniques; device mismatch; integrated circuit identification; laser link cutting; nonalterable identification; part rebranding; randomness; repeatable information; standard submicron CMOS process; wafer-level techniques; work in progress; Circuit testing; Databases; Intrusion detection; Logic devices; Logic testing; MOSFETs; Radiofrequency identification; Silicon; Transistors; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 2000. Digest of Technical Papers. ISSCC. 2000 IEEE International
Conference_Location :
San Francisco, CA, USA
ISSN :
0193-6530
Print_ISBN :
0-7803-5853-8
Type :
conf
DOI :
10.1109/ISSCC.2000.839821
Filename :
839821
Link To Document :
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