DocumentCode
1968276
Title
A sequential circuit test generation using threshold-value simulation
Author
Cheng, K.-T. ; Agrawal, V.D. ; Kuh, E.S.
Author_Institution
California Univ., Berkely, CA, USA
fYear
1988
fDate
27-30 June 1988
Firstpage
24
Lastpage
29
Abstract
A simulation-based directed search approach for generating test vectors for combinational circuits has been proposed. In this method, the search for a test vector is guided by a cost function computed by the simulator. Event-driven simulation deals with circuit delays in a very natural manner. Signal controllability information required for the cost function was incorporated in a form of logic model called the threshold-value model. These concepts are now extended to meet the needs of sequential circuit test generation. Such extensions include handling of unknown values, analysis of feedback loops, and analysis of race conditions in the threshold-value model. A threshold-value sequential test generation program, TVSET, is implemented. It automatically initializes the circuit and generates race-free tests for synchronous and asynchronous circuits.<>
Keywords
logic testing; sequential circuits; threshold logic; TVSET; asynchronous; cost function; event driven simulation; feedback loops; logic model; race conditions; sequential circuit test; synchronous; test generation; test vector; threshold-value simulation; unknown values; Circuit simulation; Circuit testing; Combinational circuits; Computational modeling; Controllability; Cost function; Delay; Discrete event simulation; Sequential analysis; Sequential circuits;
fLanguage
English
Publisher
ieee
Conference_Titel
Fault-Tolerant Computing, 1988. FTCS-18, Digest of Papers., Eighteenth International Symposium on
Conference_Location
Tokyo, Japan
Print_ISBN
0-8186-0867-6
Type
conf
DOI
10.1109/FTCS.1988.5292
Filename
5292
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