Dual Material Gate Silicon on Insulator (DMGSOI) - Design impact on linearity

Author

Jafar, Norsyahida ; Soin, Norhayati

Author_Institution

Dept. of Electr., Univ. of Malaya, Kuala Lumpur

fYear

2009

fDate

6-8 March 2009

Firstpage

156

Lastpage

159

Abstract

This paper presents the impact of implementing Dual Material Gate (DMG) onto a fully depleted Silicon On Insulator (SOI) device on linearity performance as compare to the standard Single Material Gate (SMG) SOI device. Linearity study performed takes into account the influences of DMG properties namely gate length ratio (L₁:L₂) and gate workfunction difference (DeltaPhiM), silicon thickness (T_Si) and threshold voltage (V_TH) setting simulated using ATLAS 2D. Analysis focus on gate bias condition which determine the saturation level, relevant for obtaining minimal linearity degradation. Based on results obtained, DMG device consistently show better linearity performance than its SMG counterparts with further improvement by applying higher DeltaPhiM and T_Si.

Keywords

elemental semiconductors; semiconductor device models; silicon; silicon-on-insulator; ATLAS 2D; Si; dual material gate silicon on insulator; gate bias condition; gate length ratio; gate workfunction difference; linearity; silicon thickness; threshold voltage; Analytical models; Degradation; Design engineering; Linearity; Radio frequency; Signal design; Signal processing; Silicon on insulator technology; Threshold voltage; Transconductance; DMG-FD-SOI; SMG-FD-SOI; gate length; gate material workfunction difference (ΔΦM); linearity; ratio (L1:L2); silicon thickness (TSi) and threshold voltage (VTH);

fLanguage

English

Publisher

ieee

Conference_Titel

Signal Processing & Its Applications, 2009. CSPA 2009. 5th International Colloquium on

Conference_Location

Kuala Lumpur

Print_ISBN

978-1-4244-4151-8

Electronic_ISBN

978-1-4244-4152-5

Type

conf

DOI

10.1109/CSPA.2009.5069207

Filename

5069207