DocumentCode
1969860
Title
The road to better reliability and yield embedded DfM tools
Author
Veelenturf, Kees
Author_Institution
Philips Semicond., Nijmegen, Netherlands
fYear
2000
fDate
2000
Firstpage
67
Lastpage
68
Abstract
This paper gives an overview of the different tools, needed for accomplishing optimal IC manufacturability and rapid technology learning during the successive phases of process maturity. The paper then describes two specific DfM tools that are in use within Philips Semiconductors
Keywords
VLSI; design for manufacture; integrated circuit reliability; integrated circuit yield; monolithic integrated circuits; MARYL tool; Philips Semiconductors; VLSI circuits; optimal IC manufacturability; rapid technology learning; reliability; wire spreading; yield embedded DFM tools; yield enhancement tool; yield loss; yield prediction; Circuit testing; Design for manufacture; Design for testability; Integrated circuit technology; Libraries; Manufacturing processes; Process design; Semiconductor device manufacture; Semiconductor device testing; Virtual manufacturing;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation and Test in Europe Conference and Exhibition 2000. Proceedings
Conference_Location
Paris
Print_ISBN
0-7695-0537-6
Type
conf
DOI
10.1109/DATE.2000.840017
Filename
840017
Link To Document