Title :
Holes mobility enhancement using strained silicon, SiGe technology
Author :
Zoolfakar, A.S. ; Ahmad, A.
Author_Institution :
Fac. of Electr. Eng., Univ. Teknol. Mara, Shah Alam
Abstract :
In this research, holes mobility enhancement is studied using Silicon Germanium, SiGe technology. SiGe is deposited on silicon substrate to increase carrier mobility in the device thus will increase the drive current too. The main focus of the research is to investigate the effect of using SiGe on holes mobility. In addition, variation thicknesses of SiGe on device characteristic are also studied. Technology nodes that involve in this research are 0.9 mum, 0.8 mum and 0.7 mum. The research has been carried out using Silvaco simulation software. From the modelling result, it is observed that 100% of mobility enhancement was observed for SiGe compared to conventional PMOS.
Keywords :
Ge-Si alloys; MOSFET; elemental semiconductors; hole mobility; silicon; PMOS; Si; SiGe; SiGe technology; Silvaco simulation software; carrier mobility; device characteristic; holes mobility enhancement; size 0.7 mum; size 0.8 mum; size 0.9 mum; strained silicon; Charge carrier processes; Electric variables; Germanium alloys; Germanium silicon alloys; Lattices; MOS devices; Signal processing; Silicon germanium; Substrates; Threshold voltage; PMOS; Silicon Germanium (SiGe); holes mobility; strained silicon; threshold voltage;
Conference_Titel :
Signal Processing & Its Applications, 2009. CSPA 2009. 5th International Colloquium on
Conference_Location :
Kuala Lumpur
Print_ISBN :
978-1-4244-4151-8
Electronic_ISBN :
978-1-4244-4152-5
DOI :
10.1109/CSPA.2009.5069248
