DocumentCode
1970099
Title
CAS-BUS: a scalable and reconfigurable test access mechanism for systems on a chip
Author
Benabdenebi, Mounir ; Maroufi, Walid ; Marzouki, Meryem
Author_Institution
LIP6 Lab., Paris, France
fYear
2000
fDate
2000
Firstpage
141
Lastpage
145
Abstract
This paper describes CAS-BUS, a P1500 compatible test access mechanism for systems on a chip. The TAM architecture is made up of a core access switch (CAS) and a test bus. The TAM characteristics are its flexibility, scalability and reconfigurability. A CAS generator has been developed, and some results are provided in the paper
Keywords
automatic testing; integrated circuit testing; reconfigurable architectures; system buses; CAS generator; CAS-BUS; P1500 compatible TAM architecture; core access switch; flexibility; reconfigurability; scalability; system-on-a-chip; test access mechanism; test bus; Application software; Bandwidth; Circuit testing; Content addressable storage; Control systems; Hardware; Laboratories; Switches; System testing; System-on-a-chip;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation and Test in Europe Conference and Exhibition 2000. Proceedings
Conference_Location
Paris
Print_ISBN
0-7695-0537-6
Type
conf
DOI
10.1109/DATE.2000.840030
Filename
840030
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