Efficient memory-based FFT processors for OFDM applications

This paper presents Radix-2 memory-based FFT (MBFFT) processors. Taking the advantages of low hardware cost of MBFFT architectures, this study improves the speed performance. The improvement was achieved by an efficient memory retrieval scheme for reducing the control complexity and a clock scheme with parallel structures for reducing the cycle times and latency. Instead of using dual-port memories for data storage and retrieval, our designs use single-port memories with pre-fetch registers for hardware cost reduction. Based on the pre-layout simulation results, the core area of the developed MBFFT is 2.04 mm with the maximal work frequency of 198 MHz for N=8192 points (24 bits per word).