Functional test generation for full scan circuits

We study the effectiveness of functional tests for full scan circuits. Functional tests are important for design validation, and they potentially have a high defect coverage independent of the circuit implementation. The functional fault model we consider consists of single state-transition faults. The test generation procedure we describe uses one of two approaches at any given time in order to minimize the number of tests while minimizing the test application time. (1) It may use scan to set the state of the circuit, and observe fault effects propagated to the next-state variables. (2) It may use transfer sequences to set the circuit state, or unique input-output sequences to propagate fault effects to the primary outputs. We present experimental results to demonstrate the effectiveness of scan-based functional tests