DocumentCode :
1971505
Title :
Investigations and Physical Modelling of Saturation Effects in Lateral DMOS Transistor Architectures Based on the Concept of Intrinsic Drain Voltage
Author :
Anghel, C. ; Hefyene, N. ; Ionescu, A.M. ; Vermandel, M. ; Bakeroot, B. ; Doutreloigne, J. ; Gillon, R. ; Frere, S. ; Maier, C. ; Mourier, Y.
Author_Institution :
EPFL, Lausanne, Switzerland
fYear :
2001
fDate :
11-13 September 2001
Firstpage :
399
Lastpage :
402
Keywords :
Analytical models; Automotive engineering; MOS devices; MOSFET circuits; Microelectronics; Numerical simulation; Physics; Radio frequency; Semiconductor device modeling; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Device Research Conference, 2001. Proceeding of the 31st European
Print_ISBN :
2-914601-01-8
Type :
conf
DOI :
10.1109/ESSDERC.2001.195285
Filename :
1506667
Link To Document :
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