Impact of Shallow Trench Liner Oxidation Scheme on Junction Leakage

Author

Gopinath, V.P. ; Puchner, H. ; Mirabedini, M.

Author_Institution

LSI Logic Corporation, Santa Clara, USA

fYear

2001

fDate

11-13 September 2001

Firstpage

419

Lastpage

422

Keywords

Area measurement; Diodes; Etching; Large scale integration; Leakage current; Logic; Oxidation; Silicidation; Stress; Temperature measurement;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Device Research Conference, 2001. Proceeding of the 31st European

Print_ISBN

2-914601-01-8

Type

DOI

10.1109/ESSDERC.2001.195290

Filename

1506672

Link To Document