DocumentCode
1972095
Title
The study and realization of three-level SVPWM algorithm for high power inverter
Author
Han, Yaofei ; Fan, Xiaohong ; Zhao, Zhangfei
Author_Institution
Dept. of Electr. & Electron. Eng., Henan Univ. of Urban Constr., Pingdingshan, China
fYear
2011
fDate
16-18 Sept. 2011
Firstpage
6177
Lastpage
6180
Abstract
A novel simplified space-vector pulse width modulation (SVPWM) algorithm for high power three-level inverter is analyzed in this paper. The space-vector module algorithm of two-level inverter is applied to that of three-level inverter using DSP and FPGA. A 22Kw and a 1000kW three phase asynchronous motor are taken as experimental subject in lab and field respectively. The experiment results show the effectiveness of the novel SVPWM algorithm, and can reach good performance in practice.
Keywords
digital signal processing chips; field programmable gate arrays; invertors; synchronous motors; DSP; FPGA; high power inverter; power 1000 kW; power 22 kW; space vector pulse width modulation; three level SVPWM algorithm; three phase asynchronous motor; Bridge circuits; Digital signal processing; Inverters; Space vector pulse width modulation; Switches; Topology; SVPWM; high power; three-level;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical and Control Engineering (ICECE), 2011 International Conference on
Conference_Location
Yichang
Print_ISBN
978-1-4244-8162-0
Type
conf
DOI
10.1109/ICECENG.2011.6056990
Filename
6056990
Link To Document