• DocumentCode
    1972174
  • Title

    A high speed turbo decoder implementation for CPU-based SDR system

  • Author

    Lin Huang ; Yajuan Luo ; Hao Wang ; Feng Yang ; Zhenning Shi ; Daqing Gu

  • Author_Institution
    Wireless Commun. Group, Orange Labs., Beijing, China
  • fYear
    2011
  • fDate
    14-16 Oct. 2011
  • Firstpage
    19
  • Lastpage
    23
  • Abstract
    More and more CPU-based SDR systems appear in recent two years. Such system requires high speed real-time signal processing. In this paper, we present our effort on the speed optimization of Turbo decoder, the most computation-demanding module in all baseband modules. We jointly consider the algorithm parallelism and the processor architecture. Single Instruction Multiple Data (SIMD) instruction is used for software implementation. The evaluation results show that this proposed design can achieve a maximum of 124 Mbps throughput for single Soft Input Soft Output (SISO) module with Max-Log-MAP algorithm.
  • Keywords
    MIMO communication; maximum likelihood estimation; signal processing; software radio; telecommunication computing; turbo codes; CPU-based SDR system; SIMD instruction; baseband module; bit rate 124 Mbit/s; computation-demanding module; high speed real-time signal processing; high speed turbo decoder implementation; max-log-MAP algorithm; processor architecture; single SISO module; single instruction multiple data instruction; single soft input soft output module; software-defined radio; speed optimization; CPU-based SDR; MAP algorithm; SIMD optimization; Turbo decoder;
  • fLanguage
    English
  • Publisher
    iet
  • Conference_Titel
    Communication Technology and Application (ICCTA 2011), IET International Conference on
  • Conference_Location
    Beijing
  • Type

    conf

  • DOI
    10.1049/cp.2011.0622
  • Filename
    6192818