Title :
Improving the NBTI characteristics of long-channel PMOSFETs by short channel with source underlap structure
Author :
Lee, Chia-Wei ; Park, Sung-Kee ; Kim, Jae-Kuk ; Kim, Seong-Ho ; Kwon, S.-J. ; Kim, H.-W. ; Hwang, Y.-C. ; Park, Yu-Seop
Author_Institution :
Memory Div., Samsung Electron., Hwasung, South Korea
Abstract :
Recently long-channel PMOS transistors are being used in delay circuits to increase delay time. Negative Bias Temperature Instability (NBTI) has channel length dependency which shows that long-channel devices degrade more than short channel devices. We suggest a source underlap structure with short channel transistor to solve this problem. We confirmed the short-channel device with underlap structure shows improved NBTI characteristics compared to normal long-channel device through a device simulation.
Keywords :
MOSFET; negative bias temperature instability; semiconductor device models; semiconductor device reliability; NBTI characteristics; device simulation; long-channel PMOSFETs; negative bias temperature instability; short channel transistor; source underlap structure; Degradation; Delays; Integrated circuit modeling; Logic gates; MOSFET; Stress; NBT; long-channel PMOS; source underlap structure;
Conference_Titel :
Integrated Reliability Workshop Final Report (IRW), 2013 IEEE International
Conference_Location :
South Lake Tahoe, CA
Print_ISBN :
978-1-4799-0350-4
DOI :
10.1109/IIRW.2013.6804171