Title :
Architectures and design considerations of CMOS charge pumps for phase-locked loops
Author :
El-Hage, Mohamad ; Yuan, Fei
Author_Institution :
Dept. of Electr. & Comput. Eng., Ryerson Univ., Toronto, Ont., Canada
Abstract :
A comprehensive review of the architectures of CMOS charge pumps for phase-locked loops and an in-depth comparison of their characteristics, such as speed, minimum supply voltage, mismatch-induced errors, charge injection and clock feed-through induced error´s, and noise rejection, are presented. These charge pumps arc implemented in a 0.13μ CMOS technology and analyzed using Spectre. Simulation results are presented.
Keywords :
CMOS integrated circuits; phase locked loops; 0.13 micron; CMOS charge pumps; CMOS circuits; CMOS technology; Spectre; phase-locked loops; Charge pumps; Circuit noise; Clocks; Computer errors; Delay; MOSFETs; Phase frequency detector; Phase locked loops; Switches; Voltage;
Conference_Titel :
Electrical and Computer Engineering, 2003. IEEE CCECE 2003. Canadian Conference on
Print_ISBN :
0-7803-7781-8
DOI :
10.1109/CCECE.2003.1226383
